Docteur De L ’ Université De Grenoble

Multicore processors are now a mainstream approach to deliver higher performance to parallel applications. In orderto develop efficient parallel applications for those platforms, developers must take care of several aspects, ranging from thearchitectural to the application level. In this context, Transactional Memory (TM) appears as a programmer friendly alternativeto traditional lock-based concurrency for those platforms. It allows programmers to write parallel code as transactions, whichare guaranteed to execute atomically and in isolation regardless of eventual data races. At runtime, transactions are executedspeculatively and conflicts are solved by re-executing conflicting transactions. Although TM intends to simplify concurrentprogramming, the best performance can only be obtained if the underlying runtime system matches the application and platformcharacteristics.The contributions of this thesis concern the analysis and improvement of the performance of TM applications based onSoftware Transactional Memory (STM) on multicore platforms. Firstly, we show that the TM model makes the performanceanalysis of TM applications a daunting task. To tackle this problem, we propose a generic and portable tracing mechanismthat gathers specific TM events, allowing us to better understand the performances obtained. The traced data can be used,for instance, to discover if the TM application presents points of contention or if the contention is spread out over the wholeexecution. Our tracing mechanism can be used with different TM applications and STM systems without any changes in theiroriginal source codes.Secondly, we address the performance improvement of TM applications on multicores. We point out that thread mapping isvery important for TM applications and it can considerably improve the global performances achieved. To deal with the largediversity of TM applications, STM systems and multicore platforms, we propose an approach based on Machine Learning toautomatically predict suitable thread mapping strategies for TM applications. During a prior learning phase, we profile severalTM applications running on different STM systems to construct a predictor. We then use the predictor to perform static ordynamic thread mapping in a state-of-the-art STM system, making it transparent to the users.Finally, we perform an experimental evaluation and we show that the static approach is fairly accurate and can improve theperformance of a set of TM applications by up to 18%. Concerning the dynamic approach, we show that it can detect differentphase changes during the execution of TM applications composed of diverse workloads, predicting thread mappings adaptedfor each phase. On those applications, we achieve performance improvements of up to 31% in comparison to the best staticstrategy.